Senior Verification Engineer

Cambridge, UK | Full-time or Part-time | Permanent | Hybrid

Salary: £68,000 to £80,000 DOE

We will also consider part-time applications for this role. Please indicate your preferred working schedule in your cover letter.

About us

Riverlane’s mission is to master quantum error correction (QEC) and unlock a new age of human progress. From advances in material and climate science, to complex chemistry simulation for new drug design, quantum computers will help humanity solve some of its most important challenges. But without QEC, the industry’s defining technical challenge, such breakthroughs can never be achieved.  Riverlane is the world leader in QEC technology. QEC is a complex problem that requires a range of skills, talent and passion.  

We recently raised $75 million to accelerate our cutting-edge R&D.  We partner with many of the world’s leading quantum computing companies and governments to accelerate their path to utility-scale quantum computers. We’re making remarkable progress and growing fast. Join us! 

About the role

You will work with our talented team of hardware designers and embedded software engineers to produce a fully verified, trusted and performant solution. With full visibility of the entire stack, you will own everything verification related. As a Senior Verification Engineer at Riverlane, you will:

• Proactively work with designers and architects to define verification plans based on design specifications. You will own, define and track detailed test plans for different blocks and system level.
• Implement scalable testbenches, including checkers, reference models and coverage groups in SystemVerilog. You will implement self-testing, directed and random tests.
• Maintain the design verification environment, keeping track of regression, coverage metrics and bugs.

You do not need a background in quantum computing! You will learn this along the way.

Requirements

What we need

• Demonstrable commercial experience in functional verification, including ownership of verification planning and strategy.
• A proactive and collaborative person who actively shares feedback and can independently define the scope of work.
• Proven experience of testbench design with verification frameworks like UVM/OVM.
• Knowledge of SystemVerilog assertion (SVA).
• Exposure to different programming languages, such as C, C++ and Python.

Even better if

• You have formal verification experience.

Benefits

What can you expect from us

• A comprehensive benefits package that includes an annual bonus plan, private medical insurance, life insurance, and a contributory pension scheme  
• Equity, so that our team can share in the long-term success of Riverlane
• 28 days annual leave, plus bank holidays and enhanced family leave
• A diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics and maths) and over 20 different nationalities
• A learning environment that encourages individual, team and company growth and learning, including an annual training and conference budget for each staff member

How to apply 

Please upload a CV and covering letter by clicking 'Apply Now'. Your covering letter should explain why you are applying for the job and what skills and experience you can bring to the role. 

We review CVs as we receive them and interview as soon as we have applications that look like a good match. We do not use closing dates. So, please apply as soon as possible to avoid missing out on this role. 

If you have any queries, please contact [email protected]. 

Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity. 

Women and other underrepresented groups may be less likely to apply for a role unless they meet all or nearly all of the requirements.  If this applies to you, we still encourage you to apply - you may be a great fit, even if you don’t meet every single qualification. We’d love to hear from you. 

If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help. 

#LI-JR1