THE COMPANY

Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems, is reshaping mesh network technology for mission-critical applications – on the ground, in the air, and at sea. Its battle-proven StreamCaster family of MANET radios and proprietary MN-MIMO waveform provides the vital communications link for defense, law enforcement, and public safety agencies around the world, and in the toughest operational environments.

With deep roots in DARPA research, Silvus Technologies develops world-class advanced communications technologies that are reshaping the tactical communications landscape. From pure line-of-sight to extreme non-line-of-sight, Silvus radios form a self-healing, self-forming mesh network, enabling secure and reliable connectivity, including video and high-bandwidth data

Silvus Technologies, a wholly owned subsidiary of Motorola Solutions, Inc., is part of the MSI ecosystem of safety and security technologies.

Would you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of “Keeping Our Heroes Connected”?

THE OPPORTUNITY

Silvus is seeking a Senior FPGA/RTL Design Engineer who will report to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects aimed at addressing challenging real-world communication needs.

This position is on a hybrid schedule, a minimum of 4 days onsite per week is expected. On-site days are Monday through Thursday. The location for this role is Silvus Technologies’ Engineering and R&D Office in Irvine, CA, near the vibrant Irvine Spectrum.

The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.

ROLE AND RESPONSIBILITIES

Digital design architecting for wireless communication projects.
Fixed point design of signal processing blocks while working with systems engineers.
RTL coding, simulation, and test bench development.
FPGA synthesis and timing closure.
Hardware verification and troubleshooting; familiarity with logic analyzers.
Provide support to the RF and Software Engineering teams.

REQUIRED QUALIFICATIONS

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
Minimum 6 years of demonstrated experience in FPGA design; 4 years of FPGA design experience with a Master of Science degree; 2 years of FPGA design experience with a PhD.
Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
Must be a U.S. Citizen due to clients under U.S. government contracts.
All employment is contingent upon the successful clearance of a background check.

PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES

Master of Science degree in Electrical Engineering (MSEE).
Experience using MATLAB.
Experience with communication systems on FPGA or ASIC designs.

WORKING CONDITIONS & PHYSICAL REQUIREMENTS

Office environment.
Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
While performing the duties of this job, the employee is required to do the following:
- Lift equipment up to 20 lbs. for the set-up of demonstrations and testing.
- Perform bending and reaching movements to place items on lower and higher shelves.
- Kneeling or squatting to access lower shelves.
- Walking/Moving in the labs

COMPENSATION

The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate’s experience and qualifications.

CA Pay Range

$125,000—$195,000 USD

NOTE - As a US Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does NOT apply to international positions; only job postings for positions located in the US.

All employment is contingent upon the successful clearance of a background check and drug test.

Silvus is proud to be an equal opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws.

We will ensure that individuals with disabilities are provided with reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive benefits and privileges of employment. Please contact us to request accommodation.

*Silvus does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to Silvus Technologies.

Senior FPGA / RTL Design Engineer - Signal Processing

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