Senior Emulation Validation Engineer

Job Description

We are looking for Senior Emulation Validation Engineers who are passionate about bringing next-generation SoCs to life on industry-leading emulation platforms. You will play a critical role in validating complex SoCs for AI connectivity and cloud infrastructure, ensuring functionality and performance well before silicon tape-out.

Basic Responsibilities

• Play a key role in developing complex SOCs for AI connectivity and cloud infrastructures 
• Bring up and validate these SOCs using the industry standard emulation platforms (Palladium and Zebu) 
• Bring up and validate high-speed serial interfaces such as PCIe, Ethernet and UALink, and overall SoC functionality 
• Verify the SOC peripheral interfaces I2C/JTAG/SPI/UART etc.
• Collaborate closely with Architecture, Design, Verification, and SW/FW teams to define and execute functional/performance validation plans
• Develop C/C++ FW and tests to validate and execute all test plan items 
• Build tools and methodologies to validate and debug all HW and SW/FW issues on the emulation platform

Required Qualification

• BS/MS in Electrical Engineering, Computer Engineering or related field.
• 5+ years of hands-on experience in pre-silicon validation using the emulation platforms (Palladium and/or Zebu).
• Strong hands on experience in running and debugging SOC simulation and emulation platforms.
• Protocol knowledge in high-speed protocols like PCIe, UALink and/or Ethernet is essential
• Proficiency in programming and scripting languages (System Verilog, C/C++, Python) 
• Strong debugging and analytical skills
• Experience in PCIe switch architectures, networking engine/packet processors, SOC peripheral protocols is a plus.
• Excellent communication skills and ability to work independently with minimal supervision.
• Currently based locally or open to relocation.