Principal ASIC Design Engineer

At Atom Computing, we build quantum computers using arrays of optically trapped neutral atoms that will empower customers to achieve unprecedented computational breakthroughs. Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing. Atom Computing is seeking a Principal ASIC Designer to lead the development of critical technologies that power our neutral-atom quantum computers. In this role, you will own the end-to-end design strategy—from requirements definition through silicon bring-up—while driving critical trade-off decisions across performance, power, area, and system integration. As our first ASIC hire, you will provide strategic guidance to executive stakeholders, shaping our long-term silicon roadmap and defining our internal design methodologies. This position requires deep expertise in mixed-signal ASIC development and a "systems-first" mindset. Reporting to the Hardware Engineering Manager, you’ll collaborate with a world-class group of physicists and engineers to translate quantum gate requirements into production-ready silicon. This position may be based in Boulder, CO, or Austin, TX.  Responsibilities

Participate in the design and development of FPGA designs to learn the hardware architectures and designs that we intend to scale for performance and density

Lead the research and assessment into how to best leverage ASICs to enable higher performance and higher density future generations

Establish ASIC design processes internal to Atom Computing by defining methodologies across architecture, RTL, verification, and tapeout.

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.

Manage schedules and vendor interfaces by coordinating milestones, aligning with ASIC partners, and ensuring successful fabrication.

Work closely with Atom Computing’s quantum physicists, optical engineers, hardware and software engineers to understand use cases and deliver hardware that addresses the needs. 

Manage the product roadmap and subsystem delivery schedules for both commercial and research projects. 

Experience & Education

MS or PhD in Electrical Engineering or a related field.

10+ years of post-degree experience in hardware engineering, specifically in ASIC/SoC environments.

Qualifications

Have gone through 2 or more complete ASIC design cycles.

Experience porting designs from FPGA prototypes to ASICs

Proficiency with RTL (SystemVerilog preferred)

Experience in implementing large digital signal processing blocks in RTL

Working knowledge of performance and limitations of ASIC fabs, partners, and design nodes as well as FPGA capabilities to guide selection of best fit for our applications

Knowledge of Cadence, Synopsys, or Siemens EDA design tools

Expertise in FPGA, microprocessor, and related digital circuit design and functions

Mixed signal design experience is a plus.