Hardware Verification Intern (Summer Internship)

Role: Hardware Verification Intern

Type: Full-time paid internship

Duration: at least 8 weeks, starting June/July 2025

Team: Verification Team, Brno Design Center

Location: Brno, Czech Republic (on-site)

Are you passionate about technology and eager to uncover hidden flaws before they become real-world issues? Hardware verification engineers are the heroes behind the scenes, ensuring that cutting-edge processors function flawlessly. At Codasip, we know verification is a crucial pillar of CPU design, making the impossible possible by finding and fixing problems before they ever reach production.

Requirements

As a Hardware Verification Intern, you will play an essential role in ensuring the quality and correctness of our modern RISC-V processors. You will gain experience in various aspects of hardware verification, including simulation, debugging, checkers, golden models, stimulus generation, and coverage analysis. This internship is a fantastic opportunity to learn from experienced engineers, explore different verification methodologies, and develop both technical and soft skills that will shape your future career.

What You’ll Learn & What We Offer
This internship blends skill development with unique opportunities:

• Technical Expertise: Hands-on experience with RISC-V architecture, simulation, stimulus generation, and formal verification.
• Methodologies: Exposure to industry-standard tools and practices (e.g., UVM, coverage analysis).
• Mentorship & Growth: Guidance from experienced engineers in a collaborative environment, with potential for future full-time roles.
• Culture & Innovation: A dynamic workplace with team-building activities, networking, and a focus on open-source/DIY projects.
• Soft Skills: Professional development in planning, communication, and teamwork.

Preferred Qualifications

• Education: Bachelor’s degree completed; pursuing a Master’s in Electrical/Computer Engineering, Computer Science, or related field.
• Technical Skills: Basic knowledge of HDLs (Verilog/VHDL/SystemVerilog), Linux, Git, and scripting (Python/Bash/Tcl).
• Soft Skills: Team-oriented mindset, initiative, and strong English communication.

Nice-to-Have Skills/Experience

• Interest in verification methodologies (simulation/formal) or RISC-V architecture.
• Familiarity with UVM, simulation tools, or processor design.
• DIY/open-source hardware/software projects.

Benefits

What is Codasip about?

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.

Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.

Codasip is a private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices already in the market powered by our processor IP and tools.

Some useful links on Codasip:

• Codasip RISC V Processor Solutions
• Velký technologický úspěch. Česko povede vývoj evropského počítačového procesoru
• Design for differentiation: architecture licenses in RISC‑V
• Building a Swiss cheese model approach for processor verification
• www.zvut.cz
• Efficient verification of RISC-V processors – Technical paper
• Přednášky FIT VUT