Lead the design and development of FPGA systems for satellite communications while fostering a high-performing and diverse engineering team.
Lead, mentor, and maintain a high-performing, geographically diverse FPGA team, fostering a collaborative culture that exemplifies Kepler’s Values
Ensure the team has the tools, training, and support needed to deliver high-quality RTL designs
Provide ongoing coaching, technical guidance, and career development through regular 1:1s and structured performance reviews
Monitor day-to-day execution across multiple projects, ensuring alignment with program goals and timelines
Support hiring plans, lead interviews, and onboard new team members
Own the FPGA development across the full lifecycle: architecture, design, verification, bring-up, debugging, and deployment
Partner with program and product leads to define scope, resourcing, and delivery milestones
Support vendor selection for tools and IP, and guide make/buy decisions
Own and drive adoption of the FPGA engineering design process, establishing and championing best practices for RTL design, simulation, verification, and CI/CD
Manage project timelines, resource allocation, and long-term technical strategy
Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
5+ years of experience in FPGA/RTL design and development
3+ years of which were leading or managing engineering teams
Track record of building healthy team culture and driving performance through clear expectations and feedback
Strong communication skills and the ability to work cross-functionally
Proven ability to manage shifting priorities and drive execution through ambiguity via agile development practices
Proven ability to deliver complex hardware systems from concept to production
Proven ability to collaborate effectively with other teams both within and beyond the Engineering department
Strong technical fundamentals in FPGA/RTL design
Experience in SystemVerilog/Verilog or VHDL
Experience with FPGA toolchains (e.g., Vivado, Quartus, Libero)
Background in digital design fundamentals such as timing closure, high-speed interfaces (e.g., SERDES, PCIe, Ethernet), I/O planning, power management
Experience with simulation and verification methodologies (e.g., UVM, testbenches, formal verification) and tools (e.g. Questa, VUnit, ALint Pro, Verilator, Verible, GHDL, IcarusVerilog)
Experience with space-grade or radiation-tolerant FPGA design
Experience with high-speed data pipelines and networking protocols
Background in satellite communications, SDR, or DSP algorithms
Familiarity with heterogeneous compute systems (e.g. MPSoC UltraScale+, Versal ACAP)
Experience with CI/CD pipelines for FPGA development
Knowledge of scripting languages (Python, TCL, Bash) for automation
Experience working in fast-paced startup or aerospace environments
Familiarity with or certification in automotive/aerospace safety processes/standards
Work on cutting-edge space infrastructure and satellite technology
Be part of a rapidly growing company shaping the future of space communications
Collaborate with a highly skilled, mission-driven team
Competitive compensation, equity, and benefits
Opportunities for growth and leadership in a scaling organization
Health Insurance
Comprehensive coverage for health, dental, and vision insurance—including dependents.
Learning Budget
$1,500 annual professional development fund to support your growth.
In-office events
Town Halls, Celebration Calls, and Company-wide events to stay connected and engaged.
Paid Time Off
Unlimited vacation, supportive parental leave policy, and company-wide holiday shutdown.
Kepler Communications operates the first commercial optical data relay constellation, delivering real-time Internet access for space-based assets. Our service is tailored for industries involved in space exploration and satellite communications, empowering them with continuous connectivity to enhance their data-driven initiatives.
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