Electrical Engineer, Hardware Systems

About Etched

Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.

EE Hardware System Engineer 

Etched is looking for exceptional hardware system engineers to join our team. The candidate will be responsible for schematic design for our accelerator module, and will help us pave the way for manufacturing scale.

Representative projects:

• Lead schematic design of the mezzanine card and base board for Etched’s accelerator systems

• Work with Signal Integrity, PCB, and Mechanical Engineering to solve system level design problems

• Collaborate with ODMs/OEMs on system requirements, including bringup and validation plans

• Understand datacenter customer requirements and ensure our servers meet them

• Bring up of system base board and mezzanine card

• Create and manage PCBA documentation including BOMs and special assembly processes

• Define test plans and test equipment for bring-up and manufacturing

Requirements:

• 5-10 years of experience in complex server/switch system design and development

• Extensive experience on 100G Ethernet, PCIe Gen5, I2C, SPI, UART interfaces

• Familiar with modern AI/datacenter system architecture

• Proven track record of designing systems alongside silicon

• Deep understanding of datacenter needs, especially with respect to high power (>10 kW) AI servers

• Passionate about modern AIs like ChatGPT, and willing to learn about them on the job

We encourage you to apply even if you do not believe you meet every single qualification.

How we’re different:

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in West San Jose, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.

Benefits:

• Full medical, dental, and vision packages, with generous premium coverage

• Housing subsidy of $2,000/month for those living within walking distance of the office

• Daily lunch and dinner in our office

• Relocation support for those moving to West San Jose

Compensation Range

• $150,000 - $275,000