Design Verification Engineer, ASIC

Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle's software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world's highest performance automotive compute platforms.

In this hybrid role, you'll report to a Hardware Engineering Manager.

You will:

• Work closely with the design team to define specifications and test plans
• Execute on test plans, including test development, reference model design, and failure debug. Verify key functionality and performance use cases.
• Contribute to the development of overall verification infrastructure, tools, and methodology
• Identify and integrate third-party verification IP
• Collect and analyze coverage metrics
• Advocate and establish verification best-practices

You have:

• 3+ years of experience using UVM to verify ASICs
• Knowledge of SystemVerilog
• Experience with digital architecture and logic
• Advanced verification techniques like constrained random generation, functional coverage, and assertions

We prefer:

• Experience with the full digital design verification cycle -- from spec through bring-up
• Experience with performance and power validation, digital design (RTL), and formal verification
• Experience with machine learning and other high performance compute elements
• Experience with C/C++ for reference model development and enhancement
• Familiarity with formal verification methods
• Experience with industry standard protocols, interfaces, and IP components, such as PCIe, DDR, Ethernet, and NoCs

#LI-Hybrid