Solidigm is hiring a

SoC Design Engineer

Vancouver, Canada
Full-Time

As a design-focused ASIC engineer, you will perform logic design, implementation and documentation for the SoC (System on a Chip) development.  You will collaborate with other functional teams to determine the micro-architecture, logic design and system simulation for the SoC development as well as define module interfaces/formats based on system requirements and customer feature requests.

A design-focused ASIC engineer will:

  • Perform logic design for the integration of cell libraries, functional units and sub-systems into SoC full chip designs
  • Perform Register Transfer Level (RTL) design and simulation for SoCs
  • Contribute to the development of multidimensional designs involving the layout of complex integrated circuits
  • Perform all aspects of the SoC design flow from high-level design synthesis to place and route, timing and power to create a design database that is ready for manufacturing. 
  • Analyze equipment to establish operation infrastructure, conduct experimental tests, and evaluate results. 
  • May also review vendor capability to support development
     
  • Excellent written and verbal communication skills
  • Project-based teamwork experience
  • Object-oriented programming experience
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
  • Minimum of 10 years of experience in ASIC/SoC design and/or verification environment
  • Very strong debugging and problem-solving skills supported by relevant experience
  • Digital logic design and implementation in advanced technology nodes
  • Working experience in UVM environment
  • Languages: C, C++, Python, Java, Verilog (or VHDL), SystemVerilog

Preferred Qualifications:

  • Leadership skills
  • Familiarity with formal verification methods
  • Familiarity with standard ASIC/SoC design flows including synthesis, DFT, STA, UPF, and ECO flows
  • Experience in low-power design techniques
  • Working knowledge of NVMe, PCIe, DDR and ARM standards
  • Familiarity with big box emulation platforms
  • Proven ability to architect and lead IP/SoC-level verification efforts
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