In this position, the individual will be responsible for designing, developing, modifying and evaluating Chip architecture and Core/Analog/Data Path circuit structures for feasibility study of high performance NAND flash, including new, most advanced 3-dimentional NAND memories. Evaluation of these circuits will be done through HSPICE, PRIMESIM and VERILOG simulations and through silicon evaluation when the silicon arrives.
•Requires MS or BS degree in Electrical Engineering or equivalent with 10 or more years of relevant experience.
•Knowledge and/or experience in non-volatile memory design (NAND flash memory cell operation in particular) is a big advantage
•A strong device background and experience with evaluating new process technologies for use in design is preferred.
•The ideal candidate must have proven ability to achieve results in a fast moving, dynamic environment
•Self-motivated and self-directed, however, must have demonstrated ability to work well with people
•A proven desire to work as a team member, both on the same team and outside of the team
•Ability to troubleshoot and analyze complex problems.
•Ability to multi-task and meet deadlines.
•Excellent communication (written and verbal) and interpersonal skills.
Because Western Digital thrives on the power of diversity and is committed to an inclusive environment where every individual can thrive through a sense of belonging, respect, and contribution, we are committed to giving every qualified applicant and employee an equal opportunity. Western Digital does not discriminate against any applicant or employee based on their protected class status and complies with all federal and state laws against discrimination, harassment, and retaliation, as well as the laws and regulations set forth in the "Equal Employment Opportunity is the Law" poster.
