If you’ve held a smartphone, driven an electric vehicle, or powered up a smart TV,
you’ve encountered what we do at Arteris.
Here, the future is quite literally in your hands—and when it isn’t, chances are
you are driving it or it is flying overhead in a drone, a satellite, or you are accessing
it in the cloud at a datacenter!
As a Field Application Engineer in North America at Arteris, you will work with a
team of solution architects, becoming an expert in Arteris Network-on-Chip (NoC)
technology for the most advanced System-on-Chips across the industry.
Your deep understanding of digital design, from SoC architecture definition to
implementation, enthusiasm for technology, creativity, problem-solving, and
excellent communication skills, makes you a valued member of our customer
success team.
You will have the opportunity to help influence the architecture of primary on-chip
interconnects as well as the coherent interconnect of cutting edge SoC designs
Key Responsibilities:
Ø Be recognized by customers as an expert on interconnects for System-on-Chips.
Ø Present Arteris SoC technology features and solutions to prospects.
Ø Provide technical expertise to the sales force to demonstrate to customers
the product value.
Ø Help customers get the most out of Arteris NoC technology in their SoCs.
Ø Interface between customers and R&D to escalate requests for improvements
and provide a good understanding of customer needs.
Requirements:
Ø BSEE / MSEE With a minimum of 3-5 years of front-end digital SoC experience,
from RTL to synthesis.
Ø Good understanding of System-on-Chip architecture.
Ø Good knowledge of the AMBA AXI 3 & 4 protocol.
Ø Ability to work in a team, creativity.
Ø Excellent communication / presentation skills.
Ø Motivated to train and educate others to help them solve complex problems.
Ø Travel Expected 15% - 25%.
Desired:
Ø Familiarity with the ARM and RISC-V ecosystem (CPU, interfaces, fabrics).
Ø Understanding of cache coherency and on-chip networks.
Ø Familiarity with Place and Route, Timing closure, SystemC,
HDL Simulation, Python, TCL, UNIX/Linux.
Ø Knowledge of SoC Integration flows and processes.
