Senior Engineer, ASIC Development Engineering

• Minimum 2+ years of experience in Verification of IP/Sub-system/SoC.
• Prior experience in working with any serial protocol verification like UFS/PCIe/SATA/USB etc.
• Experience on AMBA protocols(AXI/AHB/APB) is must.
• Strong hands on experience in Verilog, System verilog and UVM.
• UVM testbench development to build a robust, scalable and efficient testbench.
• Experience in Integrating 3rd Party VIPs in Testbench.
• Hands on experience on ARM based SOC verification.
• Understand design & Arch Spec and prepare detailed verification strategy and test plan/Coverage plan.
• Good expertize in verification process from Spec to Verification Sign-off.
• Strong debugging skills to root cause the issues.
• Experience in working on Formal verification, GLS & UPF simulations.
• Good at using simulation tools like Simvision, IMC, Verdi, VCS etc.
• Good at Perl/Phython Scripting languages.
• Excellent verbal and written communications skills.

Qualifications:

• BS with 2+ yrs experience
• MS with 0+ yrs experience
 

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