Codasip is hiring a

RTOS Engineer

Dresden, Germany
Full-Time

Welcome to Codasip

We believe Codasip is the most innovative processor solutions company. We take pride in designing and developing cutting-edge, high-performance, and energy-efficient CPU cores from scratch, and our own automated proprietary tools to fully customize them. We give our customers a unique competitive advantage by empowering their system-on-chip developers to build the most innovative products.

Our processor cores are based on the RISC-V open architecture. The potential for customizing RISC-V is unlocked with the Codasip Custom Compute approach: our unique architecture description language, CodAL, and the powerful automated processor design tool, Codasip Studio. These are at the heart of our unique and groundbreaking RISC-V processor solutions.

Founded in 2014, we've grown into a thriving and talented global community. Our IP engineering teams work from offices spread across Europe, including our first and largest design center in the beautiful city of Brno, Czechia. Across Europe, we already have design teams in Cambridge, Bristol, Munich, Villeneuve-Loubet, Barcelona, Thessaloniki, Heraklion and Athens. The Codasip team is also based close to its customers, which means we have dedicated sales and application engineers in the USA, Japan, Korea, and China.

Codasip is a private company backed by well-funded EU grants. Our products are already making a real impact, with billions of devices already in the market powered by our processor IP and tools.

Requirements

The role

We are looking for an experienced embedded software developer to join our Embedded Software team and be part of realizing a whole new paradigm in semiconductors and microprocessor design. The role will be within our Labs organization, where we work on cutting edge technologies and prepare them for rapid commercialization.

The scope of the work is broad, varied, and technically challenging and will include:

  • Customizing firmware, OS/RTOS and low-level libraries to support Codasip’s standard and customized embedded CPU cores. As well as supporting our standard RISC-V cores, this work can involve enhancing OS to work with custom RISC-V extensions, such as our CHERI security technology, or even completely new processor architectures developed using our Studio EDA tool.
  • Supporting the processor design teams with software expertise to guide their microarchitectural design and optimization.
  • Exploring novel compute architectures and technologies.
  • Working with other internal teams to enhance Codasip's Studio EDA tool and improve software developer support and integration.
  • Supporting silicon bring-up and verification/validation of Codasip IP.

The role demands flexibility and lateral thinking. You will be working on both short-term customer-driven projects, as well as longer-term strategic Codasip software products.

As this is a Codasip Labs position, you will also have the opportunity to propose ideas for new software technologies and develop these to proof-of-concept and beyond.

While Codasip is headquartered in Europe, our approach and culture are typical of Silicon Valley, meaning that we value prudent risk taking and “out of the box” thinking.  We are a well-funded start-up poised for dynamic growth based on our leading edge product portfolio.

RISC-V is a revolutionary technology in the semiconductor industry. This role will have high impact and visibility in Codasip and in the growing RISC-V world. 

Main responsibilities include:

  • Developing low-level software in C/C++ and possibly Rust
  • Writing or modifying real-time OS
  • Software testing
  • Writing documentation
  • Providing technical software advice and expertise
  • Contributing new software technology ideas
  • Developing proof-of-concepts and technology demonstrators of new technology

The core skills and competencies:

  • A minimum of 5 years experience of embedded software development
  • C or C++ programming experience
  • RTOS development experience
  • Knowledge of high-level hardware microarchitecture and its effects on software performance
  • A flexible and adaptable attitude to work
  • A desire to learn and also positively influence technical direction

The following skills and experience are highly desirable:

  • Experience with RISC-V technologies
  • Experience with writing assembly language
  • Experience with different hardware architectures
  • Knowledge of hardware and software security mechanisms
  • The ability to communicate effectively
  • Experience of software innovation

Benefits

Want to be an architect of ambition? Join Codasip

At Codasip we are committed to fostering a creative and collaborative work environment. Codasippers have the freedom to explore original ideas and experiment with new techniques. We believe in the benefits of cross-departmental collaboration and encourage sharing to build awareness throughout the teams. This enables you to add value through variety in your work.

When you join Codasip, you become part of a motivated team of self-starters where your ideas are appreciated and your voice is heard. We strive to create an environment where your ambition can flourish and your career can reach new heights. So, come and join our team of architects of ambition. We can't wait to see what you'll achieve at Codasip.

Some useful links:

Codasip’s approach to custom compute

Efficiently managing tagged memory for RISC-V

Understanding RISC_V virtual memory

CHERI demo at Embedded World 2024

Codasip introduces best-in-class RISC-V core for power-efficient applications

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