Job Description :
- Strong knowledge in SIPI fundamentals i.e. IL, RL, Xtalk, Zpdn/Ztargets, TDR and SIPI debugging skills
- Must be aware of design techniques used to compensate channel losses for HS interfaces
- Proficiency in creating and simulating systems using IBIS/IBIS-AMI, CPM, HSPICE/Netlist and S-parameter models
- Can drive the system timing budget and influence hardware and IO design for higher toggle speed and BW
- Evaluate the impact of channel loss, reflection, crosstalk, and supply noise on overall system performance
- Expert in package and PCB extraction tools (PowerSi, Sigrity, Hyperlynx, Ansys HFSS/SiWave)
- Knowledge of package/PCB stack-up design and layout improvement techniques
- Experience in decoupling capacitor placement and its optimization to improve Zpdn
- Hands-on experience in ADS to run transient and frequency domain analysis
- Demonstrate familiarity with various High-Speed interfaces such as PCIE, USB, UFS, SATA, DDR, LPDDR, GDDR, HBM, NAND etc
Others :
- Strong technical, written and verbal skills required to prepare/present his/her own work independently to the internal/external customers
- Ability to drive initiatives through innovation, handle discussions with all stakeholders, take data driven decision, and meet deadlines with their own
- Automation & scripting(Python, Perl) knowledge is a plus
- Bachelors, Masters or PhD in relevant field
- 5-8 years of experience in Signal and Power Integrity domain
Because Western Digital thrives on the power of diversity and is committed to an inclusive environment where every individual can thrive through a sense of belonging, respect, and contribution, we are committed to giving every qualified applicant and employee an equal opportunity. Western Digital does not discriminate against any applicant or employee based on their protected class status and complies with all federal and state laws against discrimination, harassment, and retaliation, as well as the laws and regulations set forth in the "Equal Employment Opportunity is the Law" poster.