Your responsibilities will include, but are not limited to:
- Support NAND issue FA, customer technical issue debug and provide solutions.
- Contribute to the device technology development of state of the art NAND cell, in particular by providing expertise in NAND Cell device physics and NAND memory array operation.
- Trim and waveform/algo innovations in order to improve Vt placement, performance and reliability. Utilize first principles device knowledge to develop novel array solutions.
- Perform electrical characterization of NAND cell arrays and test structures to identify device improvement directions at component level as well as system level.
- Contributing to the cell improvement effort (performance, reliability) by providing feedback to Process Integration and Design teams
- Strong collaboration is required with design, product, system and probe engineers.
- Strong background in NAND product development and validation, familiar with NAND Cell device physics and Nand memory operation.
- Experienced in NAND issue trouble shooting and solution development utilizing first principle device knowledge, such as trim optimization and waveform/algo adjustment.
- Familiar with NAND application in system (module/SSD) and electrical characterization of NAND arrays and test platform.
- Familiar with NAND (Floating Gate and Charge Trap) devices.
Salary Range: cn¥ 324,570 - cn¥ 714,030
