Power Integrations Inc. is a Silicon Valley-based supplier of high-performance electronic components used in high-voltage power-conversion systems. Our integrated circuits and diodes enable compact, energy-efficient AC-DC power supplies for a huge range of electronic products including mobile devices, TVs, PCs, appliances, smart utility meters and LED lights. Our SCALE™ IGBT drivers enhance the efficiency, reliability and cost of high-power applications such as industrial motor drives, solar and wind energy systems, electric vehicles and high-voltage DC transmission.

 

• Development of functional digital blocks and contribution to complete mixed signal ASICs from definition to full production maturity.
• Support the Product Definition team with feasibility study, product architecture definition and digital blocks design for FPGA emulation.
• Complete RTL design in SystemVerilog of digital functions to meet all specification requirements.
• Create suitable block-level test benches for comprehensive verification of all digital blocks.
• Create suitable behavioural models and top-level test benches for comprehensive verification and regression of all system-level functions and production test functions.
• Complete digital synthesis with suitable physical constraints to meet all PPA requirements.
• Define and implement DFT architecture. Perform scan insertion, ATPG and insert test points to achieve the required test coverage.
• Define digital layout floorplan, oversee digital place-and-route, and ensure post-layout timing closure.
• Generate all necessary design documentation and participate in design reviews.
• Contribute to all product-level verification and validation plans.
• Support silicon evaluation and all product validation activities working with Product, Quality and Test Engineering up to production ramp-up.
• Contribute to Technology Process and Design Methodology improvements. 

Education and Experience

• MSc/MEng in Electronics Engineering or related subject.
• Good knowledge and understanding of digital design methods.
• Understanding of fully synthesised digital design flow with RTL and logic synthesis.
• Experience of the SystemVerilog standard and scripting languages such as TCL.
• Understanding of constraints and the automatic place-and-route flow for physical design.
• Understanding the importance of production test and design methods to maximize test coverage such as digital scan.
• Understanding of design techniques for optimising digital power consumption.
• Experience of debugging digital functions in a lab using suitable test equipment.
• Experience in producing accurate and complete documentation and reports.