FPGA Engineer I

Seeking an FPGA Engineer who has knowledge of digital circuit design, state machines, Boolean math and FPGAs.

Candidate shall have:

• Experience developing at least one FPGA design using Verilog and/or VHDL.
• Experience with scripting languages (TCL, Python) is a plus.
• Candidate shall have experience with RTL simulation and debug and have a working knowledge of synthesis operations and timing analysis.

• A Bachelor's degree in Electrical Engineering or Computer Science is required.
• Clear written and verbal communication skills are required.
• Ability to understand digital lab debug problems and use of lab tools such as bench supplies, scopes and logic analyzers is required.
• U.S. Citizenship required. 

Compensation: Base salary range is $80,000- $95,000, depending on qualifications. SEAKR offers an attractive benefits package, which includes eligibility for a year-end bonus.

SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines. 

US Citizenship Required