As a datapath engineer, you will play a central role in ensuring performance of 3D NAND designs. Your expertise will be crucial in designing and verifying NAND design that meet its stringent power, performance specs and driving development of world class verification strategies to guarantee worldclass reliable products
Key Responsibilities
- Lead design and development of datapath and I/O circuits for 3D NAND designs to achieve higher IO speeds and optimal performance.
- Architect and design robust HSIO solutions and make sure they meet stringent key performance Indicators in terms of power, performance and area within process limitations.
- Oversee front and backend HSIO testing in post-Si phase compliant with industry standard best practises
- Collaborate with cross functional teams to address and resolve product and HVM related challenges ensuring seamless integration and functionality at SSD level
- A Master's degree in Electrical or Computer Engineering with at least 5 years of relevant NAND experience, or a bachelor's degree in Electrical or Computer Engineering with 7+ years of relevant experience.
- Proven expertise in RX, TX and I/O pipeline ckt design and debug
- Hands on experience with DDR I/O interface training and calibration techniques
- Deep understanding of high speed I/o ckt layout and intricacies of their designs
- Knowledge of high speed I/o mechanisms and associated reliability concerns'
- Experience in power and signal integrity challenges of HSIO ckts
- Exceptional Communication skills with ability to articulate complex technical concepts to peers and cross-functional teams
For California, Colorado, New York, Washington, and remote roles: The compensation range for this role is $127,260 - $203,620. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.
