Astera Labs is hiring an

ASIC Engineering Program Manager

Santa Clara, United States

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with hyperscalers and the data center ecosystem, we are an innovation leader of products that are flexible, interoperable, and reliable. We are headquartered in the heart of California’s Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel. 

The ASIC EPM leads all engineering activities required for development, qualification, NPI and RTM (release to manufacturing) of Astera Labs’ ASIC products. This is a high-impact position that is directly responsible for successful execution of critical revenue goals.

Key Responsibilities

  • Be the point of contact within Astera for all matters relating to ASIC programs
  • Own the on-time, on-spec, on-budget and with high-quality delivery of ASIC products from concept through production (architecture, RTL design, verification, physical design, tapeout, validation, customer evaluation, qualification, RTM)
  • Program planning, schedules, budgeting, risk assessment, resource planning and management, and tracking related program activities
  • Review, disposition and communicate changes in scope / schedule / expense
  • Conduct regular meetings to ensure cross-functional teams are clear on expectations and problem-solving actions are in place to address issues in a timely manner
  • Maintain adequate technical depth and managerial skill to address program and product issues
  • Be the champion of your programs and maintain management and key stakeholder alignment
  • Collaborate with the team to ensure customer expectations are exceeded
  • Actively contribute to organizational development and process improvement initiatives

Job Requirements

  • Bachelors’ or Masters’ Degree in Electronics/Electrical/Computer Engineering · 10 or more years of relevant ASIC product experience in an electronics product or semiconductor company
  • Proficiency in ASIC development workflow including hands-on experience in one or more the following domains: Architecture, RTL/Analog design, Design Verification, Physical Design, Layout, post-silicon Validation/Characterization, Product or Test Engineering · Experience in solving technical problems in pre-silicon or post-silicon environment
  • 5 or more years of experience as an ASIC Program Manager, PMP certification is a plus
  • Experience building new ASIC products in advanced technology nodes (< 10 nm)
  • Experience working on ASICs for PCI-E, memory or data communication products · Technical appreciation of ASIC engineering flows (front end and backend development processes, product and test engineering, char and validation, hardware/firmware/software design)
  • Program management and analytical skills, ability to organize information for internal and external consumption.
  • Working knowledge of Microsoft Project , Atlassian Tools and JIRA Scrum Methodologies as well as using work breakdown structure to identify objectives and milestones.
  • Able to motivate and energize teams and lead by influence in a matrixed organization
  • Able to take timely decisions with limited or incomplete information
  • Strong communication skills and the ability to keep calm and make progress in high stress situations
  • Ability to travel to Astera Labs’ sites as required

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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